Counter Based Superscalar Instruction Issuing
نویسندگان
چکیده
New techniques for superscalar instruction issuing are presented. It is shown that the data dependency check for both in-order and out-of-order issuing can be performed in O(logw) gate delay using O(w2) primitive gates, where w is the size of the instruction buffer. Furthermore, we present a new counting based technique for assigning instructions to resources. It requires a delay of O(logw+logm) and an area of O(w2 logm+mw log k), where m is the number of instruction classes and k is the number of functional units. Finally, we investigate the consequences of executing the data dependency check in parallel with the resource conflict check.
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